According to an insulated gate type semiconductor device for a power device, a high voltage and a low on-resistance generally have a trade-off relationship. A MOSFET having a floating structure at a bottom of a trench has the high voltage, but at the same time, it has a problem of deterioration in on-resistance property. In order to cope with this problem, Patent Document 1 provides a low concentration p-layer for connecting a p-type body layer and the floating structure at the bottom of the trench such that the low concentration p-layer comes in contact with end portions of the trench in a longitudinal direction of the trench. The low concentration p-layer is allowed to have a high resistance when a gate voltage is turned off so as to maintain the floating structure and to secure the high voltage, whereas the low concentration p-layer serves as a carrier supply path from the body layer to the floating structure when the gate voltage is turned on so as to improve the on-resistance property.